The reliable generation of random numbers has become a central component of information and communications technology. In fact, random number generators, algorithms or devices that can produce random sequences of numbers, are now helping to secure communications between different devices, produce statistical samples, and for various other applications.

Researchers at Toshiba Europe Ltd. recently developed a new quantum random number generator (QRNG) based on a photonic integrated circuit that can be directly integrated in electronic devices. This QRNG, introduced in a paper published in Nature Electronics, can securely and robustly generate random numbers at a remarkable speed of 2 Gbit s^-1.

“Randomness is now a valuable commodity, as it drives nearly all digital protocols that enable private communication,” Raymond Smith, Senior Research Scientist and co-author of the paper, told Tech Xplore.

“The common use of pseudo-random number generators (PRNGs) poses a potential security threat because PRNGs are merely deterministic algorithms and do not provide true randomness. This is particularly critical for secure communication systems.”

Recent studies have highlighted the potential of generating truly unpredictable numbers using QRNGs, random number generators that leverage natural processes of a quantum origin. Smith and his colleagues at Toshiba have been experimenting with these techniques.

“Previous research efforts and ideas that inspired this work include the quest to simplify the hardware of QRNGs,” Smith said.

“Typically, QRNGs employ photonic components such as lasers and detectors, which are bulky and require special handling when assembled with electronics. This complexity makes QRNGs more challenging to deploy on a large scale and more expensive. However, a technology called ‘integrated photonics’ is helping to overcome these challenges.”

Integrated photonics circuits allow researchers to condense all central optical components into a single chip that is only a few millimeters in size. Smith and his colleagues tried to use integrated photonics technologies to create a photonic integrated circuit (PIC) that could simplify the complexity of their QRNG method, facilitating its future large-scale deployment.

“Over recent years, Toshiba has made a number of advances in PIC technology, including the development the world’s first chip-based quantum key distribution (QKD) system,” Smith said.

“This QKD system incorporated a QRNG PIC in a 14-pin butterfly package whose optical output needed to be fiber-coupled to a high-speed photodiode on the QRNG electronic board.”

The primary objective of the recent study by the team at Toshiba was to develop a fully-fledged QRNG based on a PIC with only electronic inputs and outputs. In addition, the researchers planned to deploy the QRNG on real devices to validate its effectiveness.

“Typically, PICs are tested under controlled conditions using specialized laboratory equipment,” Smith explained. “This approach makes it difficult to assess the performance of this technology once deployed in real systems, under real operating conditions.”

Smith and his colleagues designed a compact printed circuit board that embeds the PIC they developed, called optical entropy core (OEC). OEC has standard packaging that resembles that of other electronic chips and measures 6 x 6 mm². The circuit board it is embedded in includes electronic modules that drive the PIC, as well as modules that read out its generated random signals.

“So, how is the random signal produced?” Smith said. “The PIC comprises two lasers that emit optical pulses with random phases due to quantum noise. These pulses interfere with each other, generating a pulse with random optical intensity, which is then converted into a random current signal by a fast detector. The detector signal is processed by the board and converted into random bits that can be distributed at a very fast rate (Gb/s).”

The primary advantage of the new integrated photonics-based QRNG is that its underlying PIC is cost-effective and can be assembled on electronic boards using conventional serial assembly methods. This could facilitate its future large-scale deployment in various electronic devices, making it a competitive and better performing alternative to PRNGs.

“We built eight boards to study the variability of performance across different devices,” Smith said. “Moreover, to ensure the security of its final output, the QRNG performs health tests on the OEC’s output to verify that it continuously operates as expected, automatically adjusting the OEC driving parameters if required, as well as calculating the secure generation rate that it can achieve in real time. If this rate drops, the QRNG can automatically adjust the post-processing to ensure that the final output remains unpredictable.”

While PICs are generally tested in isolation using specialized equipment, the PIC developed at Toshiba can be seamlessly integrated with electronics and tested in real-world settings. Initial tests were highly promising, demonstrating that OEC can operate as reliably as other standard electronic components.

“We embedded a QRNG board in a QKD system and operated it continuously for 38 days, producing a stable random signal despite significant temperature fluctuations,” Smith said. “This test demonstrates the readiness of our QRNG for deployment in real systems, under real operating conditions. Another notable point is that we obtained very similar performances from all eight boards, which is critical for establishing a performance baseline.”

The recent study by this team of researchers represents a key advancement in the development of integrated photonic-based QRNGs and could contribute to their future mass deployment. So far, Smith and his colleagues were able to attain a random bit generation rate of up to 8 Gbit/s, yet they soon hope to further increase this rate.

“This will make these QRNGs appealing for simulations and high-performance computing,” Smith added. “We also plan to continue to increase the robustness of our QRNGs to ensure that they can operate reliably in real-world use cases.”

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A research team has significantly enhanced the data storage capacity of ferroelectric memory devices. By utilizing hafnia-based ferroelectric materials and an innovative device structure, their findings, published on June 7 in the journal Science Advances, mark a substantial advancement in memory technology. The team was led by Professor Jang-Sik Lee from the Department of Materials Science and Engineering and the Department of Semiconductor Engineering at Pohang University of Science and Technology (POSTECH).

With the exponential growth in data production and processing due to advancements in electronics and artificial intelligence (AI), the importance of data storage technologies has surged. NAND flash memory, one of the most prevalent technologies for mass data storage, can store more data in the same area by stacking cells in a three-dimensional structure rather than a planar one. However, this approach relies on charge traps to store data, which results in higher operating voltages and slower speeds.

Recently, hafnia-based ferroelectric memory has emerged as a promising next-generation memory technology. Hafnia (Hafnium oxide) enables ferroelectric memories to operate at low voltages and high speeds. However, a significant challenge has been the limited memory window for multilevel data storage.

Professor Lee’s team at POSTECH has addressed this issue by introducing new materials and a novel device structure. They enhanced the performance of hafnia-based memory devices by doping the ferroelectric materials with aluminum, creating high-performance ferroelectric thin films.

Additionally, they replaced the conventional metal-ferroelectric-semiconductor (MFS) structure, where the metal and ferroelectric materials that make up the device are simply arranged, with an innovative metal-ferroelectric-metal-ferroelectric-semiconductor (MFMFS) structure.

The team successfully controlled the voltage across each layer by adjusting the capacitance of the ferroelectric layers, which involved fine-tuning factors such as the thickness and area ratio of the metal-to-metal and metal-to-channel ferroelectric layers. This efficient use of applied voltage to switch ferroelectric material improved the device’s performance and reduced energy consumption.

Conventional hafnia-based ferroelectric devices typically have a memory window of around 2 volts (V). In contrast, the research team’s device achieved a memory window exceeding 10 V, enabling Quad-Level Cell (QLC) technology, which stores 16 levels of data (4 bits) per unit transistor. It also demonstrated high stability after more than one million cycles and operated at voltages of 10 V or less, significantly lower than the 18 V required for NAND flash memory. Furthermore, the team’s memory device exhibited stable characteristics in terms of data retention.

NAND flash memory programs its memory states using Incremental Step Pulse Programming (ISPP), which leads to long programming times and complex circuitry. In contrast, the team’s device achieves rapid programming through one-shot programming by controlling ferroelectric polarization switching.

Professor Lee of POSTECH commented, “We have laid the technological foundation for overcoming the limitations of existing memory devices and provided a new research direction for hafnia-based ferroelectric memory.” He added, “Through follow-up research, we aim to develop low-power, high-speed, and high-density memory devices, contributing to solving power issues in data centers and artificial intelligence applications.”